Direct RF, Mixed Signal and Video Processing

View our range of Direct RF, Mixed Signal and Video Processing Suppliers Below

Innovation in the soul – EASii IC’s divisions produce a wide range of technologies, but there is an element that brings them all together: the desire to invent new products for our Customers or for our Activities to improve everyday life.

Jariet provides a true software-defined radio and enables ultra-wide, multi-function and multi-band signal capture and generation from a single component.

Puzhi’s focus is on providing SDR/ARM/FPGA core boards, development boards and customer customized services. The company’s products are exported to more than 60 countries around the world.

Secure, low-bandwidth video transmission solutions for defense, government, and commercial sectors. Enhancing real-time video delivery in bandwidth-constrained and contested environments.

Shenzhen Shenxin Technology Co., Ltd. specializes in high-performance data converters and RF front-end ICs, providing Pin-to-Pin compatible alternatives to ADI, TI, and other leading international vendors.

Frequently Asked Questions

What data link protocols and interface standards are required to support modern Direct RF sampling architectures?

To manage the massive data streams generated by multi-gigasample data converters, modern Direct RF systems rely heavily on high-speed JESD204B/C serial interfaces. These links allow multi-channel data to stream directly between the data converter cores and the FPGA/SoC fabric. For system-level routing, these hardware platforms typically incorporate optical interfaces like QSFP28/QSFP+ modules to sustain data transfer speeds exceeding 2 GB/s per channel, alongside high-throughput NVMe interfaces for continuous, uncompressed data logging.

High-end developer kits are built to support both hardware-level HDL development and higher-level software frameworks. Many modern platforms integrate out-of-the-box PYNQ framework support, which lets system engineers interface with underlying programmable logic using Python scripts via an accessible web browser. They typically include functional baseline models for testing complex modulations (such as OFDM, QPSK, and BPSK), allowing engineering teams to calculate loopback error rates and validate DSP pipelines immediately upon initial boot.

When qualifying a pin-compatible or drop-in hardware alternative for high-speed ADCs or DACs, verifying the physical footprint is only the baseline step. Engineers must perform a rigid bench review focusing on three core areas:
  • Clock Phase Noise & Jitter Tolerances: Minor timing variations in the sampling clock can severely degrade system performance at gigahertz speeds.
  • SPI Register Configuration Mapping: Control commands and boot-up initialization scripts must be validated line-by-line to adjust for internal register structure changes.
  • Dynamic Performance Metrics: Signal chains should be rigorously evaluated for SFDR (Spurious-Free Dynamic Range) and ENOB (Effective Number of Bits) across the target operating passband.

By sampling the electromagnetic spectrum directly at the antenna interface, modern data converters completely eliminate the need for traditional, noisy analog intermediate frequency (IF) downconversion stages. High-performance portfolios offer resolutions ranging from 12-bit to 16-bit while achieving sampling rates from 50 MSPS up to 10.25 GSPS. This allows engineers to move the boundary of the digital domain as close to the physical antenna as possible, maximizing software-defined flexibility.

To minimize the need for external analyzer arrays during early-stage prototyping, advanced development systems include comprehensive host-side GUI toolkits. These software packages effectively convert the embedded processing hardware into an interactive three-in-one testing suite. Engineers can simultaneously utilize the system as a synchronized multi-channel waveform generator, a real-time time/frequency domain oscilloscope, and an eye diagram analyzer to verify signal path degradation and phase margins during loopback testing.

Processing systems deployed in remote telecom towers, aerospace systems, or industrial automation bays face severe thermal stresses. Components are grouped by strict operating boundaries, ranging from standard industrial grades (-40°C to +85°C) up to ruggedized, space-constrained SKUs rated for military conditions (-55°C to +105°C). These components are certified to maintain flat insertion loss curves, minimal clock drift, and stable linearity throughout violent temperature shifts.